What Intel’s Fab-for-Hire Plan Could Offer Hyperscale Cloud Platforms

In what could be excellent news for hyperscale cloud providers looking for custom silicon to fit specific problems, Intel is changing what processor technology it builds CPUs with, who builds them and who it builds chips for. The move is a response to compete with the combination of NVidia and Arm, and with the foundry services like TSMC that supply Apple. Intel will use third-party fabrication plants when it needs to and offer its own fabs for custom designs, allowing x86 cores to be used in the same manner that’s made Arm IP so successful.

Bringing the Execution Back

The return of Pat Gelsinger as CEO, as well as other veteran chip designers who have recently joined the company, suggests that Intel was serious about catching up with other silicon suppliers where it has fallen behind. So, 5 nanometer and even 3nm processes are on the roadmap for other silicon foundries but Intel had been stuck on its move to 7nm, after delays in getting to 10nm.

Announcing Intel’s new “back to engineering and execution” strategy, Gelsinger admitted that, and explained the problem. When it started on 7nm, the extreme ultraviolet lithography the manufacturing process requires was “a nascent technology” so Intel used it as little as possible; that meant the process design wasn’t ready to take advantage of EUV when it matured and Intel was left adding refinements like SuperFIN (which uses novel materials to create more efficient transistors) to 10nm instead.

Intel spent the last nine months redesigning that; “We’ve righted the ship and 7nm is on a good course,” Gelsinger said on a call with press and Wall Street analysts, promising that the company would go faster, with improvements in process technology coming on a yearly cadence. (The way Intel refers to different process geometries like 10nm and 7nm is extremely conservative, so it’s not necessarily as far behind as it may look.)

What Gelsinger calls “the majority” of notebook and desktop CPUs from Intel this year will be on 10mn, with 7nm Meteor Lake (for client) and Xeon Grand Rapids silicon arriving in 2023 with 7nm compute “tiles”, and the Ponte Vecchio GPU accelerator will mix tiles at 7nm, 10nm and other process geometries.

Tiles let Intel create “XPUs” – more heterogeneous processor units that can include execution (CPUs), graphics (GPUs), the kind of networking and data processing done on SmartNICs (which NVidia dubs a “Data Processing Unit [DPU]) and other accelerators, with different tiles created in Intel’s own fabs and by other foundries. “We’re going to be focused on AI and graphics and networking as well as CPUs,” Gelsinger noted.

This tile strategy is also what makes the idea of Intel offering foundry services so interesting, especially for cloud platforms and hyperscalers with the expertise and money to take advantage of the x86 cores, as well as ARM and RISC-V IP, that will be available.

Designing with Tiles

Processors have been moving to a more modular approach for a while, first with System on Chip (SoC) incorporating multiple accelerators alongside the CPU and GPU, and now with chiplet interconnects that allow silicon manufacturers to combine multiple dies in the same package. Intel’s version of that is called EMIB (Embedded MultiInterconnect Bridge) and it uses little silicon “bridges” to make the connections; Intel already uses EMIB in Kaby Lake laptop CPUs and Stratix FPGAs, where it connects IO and memory that use different transistor designs. Chiplets are normally a single layer: Intel can also stack and tile different modules into a 3D package, a packaging technology it calls Foveros that’s already used to create Core processors for laptops and desktops. Putting those together creates what Intel calls tiles.

“We don’t have to buffer interconnect,” Gelsinger explained on the call; “It’s like a long wire on the chip. That packaging technology is part of what gives us a really cool advantage in the next generation of our process roadmap where we’re going to be able to mix and match tiles from different process technologies but bring them together as if they were one single chip. We’ll be moving from System on Chip to System on Package.”

Tiles offer a more composable approach to processor design where you can bring together multiple, heterogenous silicon modules into one CPU, including licensed or custom designs. That lets you create designs larger than would fit on a single chip, but it’s also more flexible: if you need to tweak the design for performance or battery life, you can swap out just one modular tile rather than building a whole new design.

Those tiles might be created in Intel’s fabs or in a TSMC, Samsung, GlobalFoundries or UMC facility if they have better facilities for a particular tile.

Intel hasn’t been totally purist about making everything in its own foundries. Manufacturing capacity for Optane was originally shared with Micron, it’s previously used third-party fabs for chips for what Gelsinger referred to as communications, connectivity and graphics chipsets and some of the tiles in Ponte Vecchio are already coming from external foundries.

But having Intel CPU tiles manufactured elsewhere is a significant change, and so is allowing x86 cores and other Intel modules to be used in third-party designs made in Intel’s fabs.

An Intel spokesperson told us foundry service customers will get “access to our world-class IP portfolio, including: x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP”.

Intel’s 2023 processors will be using tiles, and Intel Foundry Services customers will get that option too, Gelsinger said. “We’ll be mixing and matching the XPU components into a single solution for the industry.”

The new fabs that Intel is building, first in Arizona and then elsewhere in the US and Europe, will be for both Intel’s own manufacturing and for the new foundry service. Partly it’s about having more foundry capacity. More of that capacity is in the US and Europe, in response to concerns about the growing tension between Taiwan — home of more than 60% of worldwide foundry capacity — and China (which has about 20% of that capacity, including an Intel fab), as well as security worries like the long-running (but always inconclusive) Supermicro saga.

But Intel has big ambitions for the foundry service; Gelsinger would like to see Qualcomm and Apple using its fabs and cloud providers getting custom chips that differentiate their services.

“We’re going to go to our cloud customers, and say ‘Let’s go create opportunities to more uniquely meet your business requirements because you’re at such extraordinary scale.’ We’re also going to go to some people like Qualcomm, who might have been more competitive before, and we’re now going to say, ‘Hey, let’s find ways to leverage our technologies in ways that weren’t possible before and can we become your foundry partner?’ We also will pursue customers like Apple and say, ‘Boy, you know, are we possible [partners] to build and expand on your foundry capabilities as well?’”

Custom for Cloud

Cloud providers like Microsoft work with silicon vendors like AMD (with which, Microsoft already designed the Xbox processors) to get slightly different versions of chips. Azure and Oracle both have custom 64-core versions of Milan, AMD’s third-generation Epyc processor.

Intel does what Gelsinger calls “co-engineering” with Baidu and Alibaba, for their AI cloud server and seventh-generation ECS cloud server. In the past it’s created customized SKUs for the Google Cloud Platform with early versions of the instructions that offer better support for tensor processing for deep learning and supplied Cloudflare with some SKUs that “aren’t regularly available” (using cores that don’t pass the tests to run at higher frequencies) to meet their performance, price and power requirements.

But that’s not nearly as customized a design as Amazon Web Services (AWS) has with its Graviton Arm processors, where two-thirds of the silicon was designed in house. Now, cloud providers could use the Intel Foundry Service to help them design and manufacture custom designs that could include x86 cores — or Arm or RISC-V cores — alongside accelerators designed to speed up specific workloads like machine learning, search and indexing or networking and security. Another veteran microprocessor designer returning to Intel, Sunil Shenoy, is coming back from RISC-V vendor SiFive.

“I believe Intel has a big opportunity to bring more customized solutions to the table in the data center,” President and Principal Analyst at Moor Insights & Strategy Patrick Moorhead told us.

The return of Pat Gelsinger as CEO, as well as other veteran chip designers who have recently joined the company, suggests that Intel was serious about catching up with other silicon suppliers where it has fallen behind.

“I think Intel’s best opportunity in the data center with Foveros [Intel’s 3D packaging technology] and its new manufacturing strategy would be custom SoCs. Look at what Xilinx is doing with its SoCs where yes, they have an FPGA, but also CPU, and a custom ASIC. Graviton is another example where AWS could ask for their own IP, processors (single-threaded), ML accelerators (their own), the preferred I/O and memory controller. Obviously, AWS would still need to design it, unless Intel offered a custom design service like AMD offers for game console SoCs, but Intel could manufacture it in their new foundry.”

This is a much bigger and more serious commitment than the rather half-hearted attempt Intel made at offering third-party silicon fabrication some years ago (where new processes wouldn’t be offered to customers until a year or more after Intel had them). Intel is working with Cadence and Synopsys, who supply IP for semiconductor design, so their industry-standard tools work well with the Intel processes — making it easier for customers to bring the IP they’ve already licensed to an Intel fab — and extending its own tools so they handle Arm and RISC-V cores as well as x86. The foundry services will offer everything from producing wafers to assembling and testing them — even if they come from other fabs.

“This is absolutely critical for Intel’s relationship with the hyperscalers,” Kevin Krewell, principal analyst at TIRIAS Research said.

“As seen with AWS’s Graviton processors, the cloud vendors and hyperscalers has very specific needs for their data centers. But offering Intel’s IP portfolio, including x86 CPU cores and Xe graphic cores, and third-party CPU cores from Arm and RISC-V, Intel can recapture business going to TSMC and keep future business from leaving. It’s a big commitment, but this time I think Intel is serious. Dedicated capacity and different P&L makes it a real business.”

For the longer term, there’s a new research collaboration with IBM to create next-generation logic and packaging technologies for bringing all these pieces together more effectively.

“The historic collaboration with IBM will also help the Intel process roadmap hit its goals,” Krewell said. “IBM has a long experience with EUV manufacturing and is well along in the development of nano-sheet transistor structure (also known as gate-all-around transistor) — the replacement for FinFET.”

There’s clearly interest from customers in the Intel Foundry Services. Microsoft CEO Satya Nadella’s appearance as part of the announcement underlines the long-term connection of Windows and Intel, and Microsoft and Intel already collaborate on things like Microsoft’s new Pluton security processor and the SGX enclave used for confidential computing.

But he might also have been referring to custom silicon designs for Azure here: “As the chips become more specialized and cloud architectures become more optimized for new workloads, we will need to collaborate, to co-design the next generation of systems from the hardware to the systems to the software.”

That’s clearly what Gelsinger is hoping for with his foundry pitch to hyperscale clouds. “The best that we have to offer is going to be made available to our foundry customers. A world-class portfolio of industry IP, but bringing together the Intel IP: graphics, AI, interconnect and x86 cores — we’re putting it all on the table. And imagine if you were a major cloud service provider saying, ‘Boy, you know I have tens of millions of cores that are running, and now I can optimize them for my business, and add some of my stuff and maybe take out some things that I don’t utilize?’ This is a powerful strategy.”